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Design Of Two Stage CMOS Operational Amplifier in 180nm Technology

Published 27 Dec 2020 in physics.ins-det and eess.SP | (2012.15737v1)

Abstract: In this paper a CMOS two stage operational amplifier has been presented which operates at 1.8 V power supply at 0.18 micron (i.e., 180 nm) technology and whose input is depended on Bias Current. The op-amp provides a gain of 63dB and a bandwidth of 140 kHz for a load of 1 pF. This op-amp has a Common Mode gain of -25 dB, an output slew rate of 32 $V / \mu s$, and a output voltage swing. The power consumption for the op-amp is $300\mu W$.

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